I want to get into PAPI. I have Version 5.3.2.0 on Debian GNU/Linux. papi_avail just tells me that no hardware events are available: $ papi_avail Available events and hardware information. -------------------------------------------------------------------------------- PAPI Version : 5.3.2.0 Vendor string and code : GenuineIntel (1) Model string and code : Intel(R) Core(TM) i3-5010U [...] read more
I'm using a Exynos 3110 processor (1 GHz Single-core ARM Cortex-A8, e.g. used in the Nexus S) and try to measure execution times of particular functions. I have an Android 4.0.3 running on the Nexus S. I tried the method from [1] How to measure program execution time in ARM [...] read more
I was using following method to read clock in cortex-a15: static void readticks(unsigned int *result) { struct timeval t; unsigned int cc; if (!enabled) { // program the performance-counter control-register: asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(17)); //enable all counters asm volatile("mcr p15, 0, %0, c9, c12, [...] read more
Windows Phone 8 C# project (MyApp), migrated from WP7.1. I've added a native Windows Runtime component library (AppLib) to the solution, created a reference. There's a public sealed ref class (MyClass) in it. There's a reference to it in the C# code (in OnLoaded of the main XAML page). The [...] read more
I'm using a STM32F429 with ARM Cortex-M4 processor. I premise that I don't know the assembly of ARM, but I need to optimize the code. I read the solution of How to measure program execution time in ARM Cortex-A8 processor? that is that I need, but that solution is for [...] read more
For my application (SpMV) I have more data cache misses (PAPI_L1_DCM) than total cache misses (PAPI_L1_TCM) in level 1 cache. How can that be? For Level 2 the values are ok. That is, what the PAPI counters offer: [PAPI_L1_ICM ][PAPI_L1_DCM ][PAPI_L1_TCM ][PAPI_L2_ICM ][PAPI_L2_DCM ][PAPI_L2_TCM ] 1256 3388225 1442386 1007 2389903 [...] read more
I want to compute the clock cycle count for a specific function inside my c code which is going to be compiled and run on BeagleBone Black. I have no idea how I can do this. I searched over the web and I found this instruction: Clock Read method on [...] read more
I am trying OSPF Unnumberd and i have a VM (CentOs) and a Switch (Cumulus-Vx). When i try to ping from the Switch interface 1 to the Vm the Vm-Interface recieves the ICMP echo request but doesnt answer. When i look into the forward routing table i dont see the [...] read more
I try to count cpu clock cycles for my function on ARM Cortex-A53 using following function: #include <sys/time.h> readticks(unsigned int *result, int enabled) { struct timeval t; unsigned int cc; unsigned int val; if (!enabled) { // program the performance-counter control-register: asm volatile("msr pmcr_el0, %0" : : "r" (17)); //enable [...] read more
I have a c++ dll, and an idl file that was used to generate a .winmd file. I created a C# application that consumes the .winmd file and I can successfully create an object for a class that was defined in the dll. i.e the program compiles and runs without [...] read more
I'm trying to update an old VB6 program and I came across this line frmMain.Command1(X).BackColor = &H8000000F When trying to convert this to C# I came up with this.Command1[X].BackColor = System.Drawing.ColorTranslator.FromOle(0x8000000f); This doesn't seem to work as the hex number is too large for .FromOle as it takes an int, [...] read more
I'm writting a linux driver for OMAP5432 (Cortex A15) which reads the processor cycle counter value to each IRQ. The counter is initialized like this : static inline void init_perfcounters(int32_t do_reset, int32_t enable_divider) { // in general enable all counters (including cycle counter) int32_t value = 1; // peform reset: [...] read more
I want to compile this code which enables cycles counters on ARM Cortex A8 through Debian OS on target. I wrote this code in /home and want to compile it. > How can i compile it and where should i put the output file? * i am just a beginner [...] read more
I'm trying to use RAPI to monitor the performance of my Xeon Phi code. I just compiled and installed a native version of RAPI follwoing the documentation. And the following list is what I get when I execute "rapi_avail" on my Xeon Phi which shall display all available events. Surprisingly, [...] read more
I solved a problem of concurrency that simulates a manufacturing cell products. I use 13 unnamed semaphores , which are handled by 8 threads running the "parts" of the problem. The execution cycle measurement "t1 " is performed after phtread_create , and " t2" is performed after pthread_join, thus get [...] read more
I am trying to use DES encryption/decryption on Google chrome. In my folder I have three files. 1. tripledes.js 2. mode-ecb.js 3. CryptoJS-DES.html The scripts in my html file is defined as follows :- <script type="text/javascript" src="tripledes.js"></script> <script type="text/javascript" src="mode-ecb.js"></script> and another script file which is :- function encryptByDES(message, key) [...] read more
I am trying to read the performance counters (cycle and event count registers) of my ARM big.LITTLE. It consists of 4 Cortex A7 and 4 Cortex A 15 Cores. I have no problems reading the values of the performance counters if I set my tested task on the A7 core [...] read more
here i have written code to find number of cycles taken by a function but i am getting error at first MCR instruction can any one suggest me how to solve this problem.This code is written in XCODE and running on ios. #include <stdio.h> static inline unsigned int get_cyclecount (void) [...] read more
I want to do profiling for my application on ARM processor. I found the oprofile doesn't work. Someone used the following code to test a few years ago. the cyclic counter does work, the performance monitor counter still doesn't work. I tested it again, it is same. For following code, [...] read more
I am trying to read the cycle count register on an ARM cortex-a8 CPU from an android native library on an emulator, emulating the Nexus S. Here are links regarding the two registers I am trying to read and write: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Bgbcjifb.html http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Bgbjjhaj.html Here is what I have done: 1. Started [...] read more