Read Cortex A15 Performance Counter from User Space

0

I am trying to read the performance counters (cycle and event count registers) of my ARM big.LITTLE. It consists of 4 Cortex A7 and 4 Cortex A 15 Cores. I have no problems reading the values of the performance counters if I set my tested task on the A7 core but if I want to test the same task on Cortex A15 I get an "illegal instruction". I put the code for enabling the counters below. I think its because my kernelmodule only enables the performance counter of the A7 to userspace. But I can't figure out how to enable the counters of the A15 to userspace. Does someone have an idea how I could do it? I appreciate any help.

#define PERF_DEF_OPTS (1 | 16)

#define DRVR_NAME "enable_arm_pmu"

static void enable_cpu_counter(void* data){

        /*Enable counters to user land*/
        __asm__("MCR p15, 0, %0, c9, c14, 0" :: "r"(1));
        __asm__("MCR p15, 0, %0, c9, c12, 0" :: "r"(PERF_DEF_OPTS));
        __asm__ ("MCR p15, 0, %0, c9, c12, 1" :: "r"(0x8000000f));
}

static void disable_cpu_counter(void* data){

        __asm__("MCR p15, 0, %0, c9, c14, 0" :: "r"(0));
        __asm__("MCR p15, 0, %0, c9, c12, 0" :: "r"(PERF_DEF_OPTS));
        __asm__ ("MCR p15, 0, %0, c9, c12, 1" :: "r"(0x8000000f));

}


static int hello_init(void)
{
        printk(KERN_ALERT "Performance counter enable\n");
        on_each_cpu(enable_cpu_counter, NULL, 1);
        printk(KERN_INFO "[" DRVR_NAME "] initialised");
        return 0;
}

static void hello_exit(void)
{
        printk(KERN_ALERT "Performance counter disabled\n");
        on_each_cpu(disable_cpu_counter, NULL, 1);
        printk(KERN_INFO "[" DRVR_NAME "] unloaded");
}

module_init(hello_init);
module_exit(hello_exit);
`
arm
kernel-module
performancecounter
cortex-a
asked on Stack Overflow Apr 8, 2016 by Marina • edited Apr 8, 2016 by Marina

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