Windows error 0xFFFFFFF1, -15

Detailed Error Information

HRESULT analysis[1]

FlagsSeverityFailure
Reserved (R)true
OriginCustomer

This code was defined by a third party software company, and may mean different things for different software. Contact the software author for more information about this error.

NTSTATUStrue
Reserved (X)true
FacilityCode4095 (0xfff)
Error Code65521 (0xfff1)

Questions

25votes
7answers

Efficient computation of the average of three unsigned integers (without overflow)

There is an existing question "Average of 3 long integers" that is specifically concerned with the efficient computation of the average of three signed integers. The use of unsigned integers however allows for additional optimizations not applicable to the scenario covered in the previous question. This question is about the [...] read more
c
algorithm
bit-manipulation
micro-optimization
extended-precision
3votes
1answer

how to prevent [circle] body from sliding into 0px gaps between static bodies

So I have this body that is a circle collider and it has sometimes a big velocity the problem is that the tiled map of the boundaries is made of small tiles and at high velocity the body goes through it here is my config of all bodies: const config [...] read more
physics
collision
matter.js
3votes
1answer

Sign of C++ Enum Type Incorrect After Converting to Integral Type

My understanding is that C++ enumerations are converted to integral types according to Integral Promotion. And during Integral Promotion, we should try converting a value to int first and if the value cannot be represented by an int, unsigned int should be used: C++03 conv.prom: > 2) .... An rvalue [...] read more
c
visual-c++
enums
c++03
2votes
1answer

Why would cortex-m3 reset to address 0 in gdb?

I am building a cross-compile toolchain for the Stellaris LM3S8962 cortex-m3 chip. The test c++ application I have written will execute for some time then fault. The fault will occur when I try to access a memory-mapped hardware device. At the moment my working hypothesis is that I am missing [...] read more
gdb
cortex-m3
openocd
1vote
1answer

ARM Cortex M4 SVC_Handler "UsageFault"

I'm creating a context switch program for a personal mini ARM kernel project and the context switch program is written entirely in Assembly. The problem is when I make a SVC call (svc 0) I enter the SVC_Handler but when I try to execute the next instruction I then enter [...] read more
gcc
arm
interrupt
cortex-m3
stm32f4discovery
0votes
0answers

Arm cortex-M4 crashes with hardfault

We get an exception and the lr is 0xFFFFFFF1. This means that we must cmp msp and psp. The address is now 0x2000E8D0. This is the stackpointer. Than I get : printf(" - Forced Hard fault.\n") printf(" - MMAR holds an invalid address.\n"); printf(" - BFAR holds an invalid address.\n"); [...] read more
arm
gnu
0votes
0answers

Why is not printing the numbers in nasm?

I'm working in assembly language,in the following program I just want to check if the buffer has numbers and print them but if the buffer has some operation sign if just print which operation is found, but the problem is with the numbers, they are not printed. sys_exit equ 1 [...] read more
assembly
x86
nasm
0votes
0answers

How to debug what ruby code is causing server issues

A few days ago all 8 of my app servers started having issues. I have not deployed any code changes in months. This is not the first time, every 4 months or so it happens. They will be fine for a while, then all of the sudden they quickly climb [...] read more
ruby
server
cpu
cpu-usage
0votes
1answer

enabling UsageFault Handler in STM32F4

I'm using IAR to debug my application that is running on STM32F4 uC and I get a UsageFault exception where the INVSTATE=1 in CFSR register. in the Debug Log I get the following messages: UsageFault, attempt to execute an instruction when EPSR.T==0 after reading a bit I understand that the [...] read more
fault
iar
stm32f4
0votes
1answer

Cortex M0 HardFault_Handler and getting the fault address

I'm having a HardFault when executing my program. I've found dozens of ways to get PC's value, but I'm using Keil uVision 5 and none of them has worked. As far as I know I'm not in a multitasking context, and PSP contains 0xFFFFFFF1, so adding 24 to it would [...] read more
debugging
arm
keil
0votes
0answers

ARM Cortex-M3 — Why might I (appear to) receive a UsageFault on a PUSH instruction?

I'm having some trouble diagnosing the cause of an INVSTATE UsageFault that appears to be occurring on a push instruction in a particular circumstance. Here's what I know: 1. If this segment of code runs from a 'fresh' boot, it runs as expected. 2. If this segment of code runs [...] read more
assembly
cortex-m3
0votes
1answer

Determine the minimum register size

I am actually new to embedded systems. I have a question on determining the minimum register size to store a particular value. Here is the question: 1. Why do it need a minimum of 8 bits register size to store 0xFFFFFFF1 (signed numbers) 2. Why do it need a minimum [...] read more
embedded
bit
cpu-registers
signed
0votes
2answers

UTF-8 encoding by characters bigger then UTF-8 upper range

I'm working on a translation of uft-8 encoding code from C# into C. UFT8 covers the range of character values from 0x0000 to 0x7FFFFFFF (http://en.wikipedia.org/wiki/UTF-8). Encoding function in C# file encodes for example the character 'ñ' without problem. this character 'ñ' has the value FFFFFFF1 in hex in my sample [...] read more
utf-8

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Sources

  1. https://msdn.microsoft.com/en-us/library/cc231198.aspx

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