Why would cortex-m3 reset to address 0 in gdb?

I am building a cross-compile toolchain for the Stellaris LM3S8962 cortex-m3 chip. The test c++ application I have written will execute for some time then fault. The fault will occur when I try to access a memory-mapped hardware device. At the moment my working hypothesis is that I am missing some essential chip initialization in my startup sequence.

What I would like to understand is why would the execution in gdb get halted and the program counter be set to 0? I have the vector table at 0x0, but the first value is the stack pointer. Shouldn't I end up in one of the fault handlers I specify in the vector table?

(gdb) 
187     UARTSend((unsigned char *)secret, 2);
(gdb) cont

Continuing.

lm3s.cpu -- clearing lockup after double fault


Program received signal SIGINT, Interrupt.
0x00000000 in g_pfnVectors ()

(gdb) info registers 
r0             0x1      1
r1             0x32     50
r2             0xffffffff       4294967295
r3             0x0      0
r4             0x74518808       1951500296
r5             0xc24c0551       3259762001
r6             0x42052dac       1107635628
r7             0x20007230       536900144
r8             0xf85444a9       4166272169
r9             0xc450591b       3293600027
r10            0xd8812546       3632342342
r11            0xb8420815       3091335189
r12            0x3      3
sp             0x200071f0       0x200071f0
lr             0xfffffff1       4294967281
pc             0x1      0x1 <g_pfnVectors+1>
fps            0x0      0
cpsr           0x60000023       1610612771

The toolchain is based on gcc, gdb, openocd.

GDB happily gave you some clue:

clearing lockup after double fault

Your CPU was in locked state. That means it could not run its "Hard Fault" Interrupt Handler (maybe there is a 0 in its Vector).

I usually get these when I forgot to "power" the periperial, the resulting Bus Error escalates first to "Hard Fault" and then to locked state. Should be mentioned in the manual of your MCU, btw.