Windows error 0x00000114, 276

Detailed Error Information

EA_FILE_CORRUPT[1]

MessageThe extended attribute file on the mounted file system is corrupt.
Declared inwinerror.h

This appears to be a raw Win32 error. More information may be available in error 0x80070114.

VIDEO_SHADOW_DRIVER_FATAL_ERROR[2]

This is a Blue Screen of Death stop code. More information is available in the Knowledge Base article Bug Check 0x114: VIDEO_SHADOW_DRIVER_FATAL_ERROR.

HRESULT analysis[3]

This is probably not the correct interpretation of this error. The Win32 error above is more likely to indicate the actual problem.
FlagsSeveritySuccess

This code indicates success, rather than an error. This may not be the correct interpretation of this code, or possibly the program is handling errors incorrectly.

Reserved (R)false
OriginMicrosoft
NTSTATUSfalse
Reserved (X)false
FacilityCode0 (0x000)
NameFACILITY_NULL[3][1]
DescriptionThe default facility code.[3][1]
Error Code276 (0x0114)

Possible solutions

1

in arm7tdmi, when FIQ and RIQ occures at same time so how both are executed sequentially,first FIQ and thenIRQ?

exception
arm
irq
arm7
fiq

Unlike the M-profile architectures, with their very different exception model which does permit tail-chaining exceptions, the classic/A-profile architectures do things in a completely straightforward manner.

Interrupts are checked for at instruction boundaries, when the respective CPSR.F/CPSR.I bits is clear. Thus, assuming the FIQ handler is straightforward, once the instruction at 0x108 completes, the FIQ is taken (as it has priority over the IRQ) from whatever mode the CPU was in, the FIQ handler runs with FIQs and IRQs masked, then performs an exception return to 0x110. The fact that there happened to be an IRQ pending throughout makes no difference whatsoever.

The point of note is the boundary between the return instruction at the end of the FIQ handler and the one being returned to. The FIQ return will restore the previous SPSR, which (presumably) has IRQs unmasked. Thus, after executing that return instruction but before executing the one at 0x110, the CPU is back in the initial mode, with IRQs unmasked, and an IRQ pending. So it takes it; the IRQ handler runs with IRQs masked, then performs an exception return to 0x110, whereupon execution eventually continues having served both interrupts.

For ARM7TDMI, that's really all there is to it. In newer architecture versions (ARMv7 onwards), there are some rules tightening up precisely when asynchronous exceptions are expected to be taken, since once CPU designs start becoming superscalar and/or out-of-order the notion of "instruction boundary" gets a bit blurry. This particular situation, though, would be no different on modern CPUs, as the exception return from FIQ constitutes a context-synchronising event after which any pending asynchronous exception (i.e. the IRQ) must be immediately taken.

answered on Stack Overflow Sep 26, 2016 by Notlikethat

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Sources

  1. winerror.h from Windows SDK 10.0.14393.0
  2. https://docs.microsoft.com/en-us/windows-hardware/drivers/debugger/bug-check-code-reference2
  3. https://msdn.microsoft.com/en-us/library/cc231198.aspx

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