RISC-V SiFive HiFive Unleashed FMADD(32) underflow flag not setting on subnormal result

so my issue is either out of my understanding of fpu mechanics, or there is a problem with implementation I am using.

Issue: When performing fused multiply-add instruction with source operand values as such, rs1 = 0xBF800000, rs2 = 0x80542353, rs3 = 0x80800000 the result is rd = 0x802BDCAD which is fine, but as it is subnormal(tiny) value I am pretty sure that fpu flag U(underflow) should be set. For some reason it is not. RISC-V documentation states that subnormal values handling conforms with ieee754-2008 on verifying tininess after rounding, which states that underflow will be signalled if result is smaller(but not 0) than smallest normal value(in that case 2^-126), and this result clearly is.

Am I missing something and flag is unnecessary or there may be issue with implementation ?