On an x86-64 CPU, is it possible to switch to unreal mode and be able to use more than 32 bits to address memory?
Usually, the CPU (80386 or later, 286 needs loadall
since it can't return to real mode without resetting and trashing all registers) can be put in unreal mode by first entering protected mode, setting up a GDT (Global Descriptor Table) entry with base 0, limit 0xFFFFF and granularity set. When loading a segment register with the appropriate selector, the segment descriptor cache stores the data in the GDT entry and persists even when switching back to real mode, allowing to access the full 4GB range using something like DS:[EBX]
. The only caveat is that it won't work well for the code segment, because interrupts change CS
and destroy the upper half of EIP
.
I know that segmentation is disabled in 64-bit long mode, so it is impossible to set up a GDT that has 64-bit segment limits. However, using MSRs (Model Specific Registers) it is possible to set the FS
and GS
64-bit base address. When switching back to real mode, does this setting persist so that addresses higher than 0xFFFFFFFF can be accessed using FS
and GS
? Or maybe there is another entirely different way to do this?
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