Porting From ARMCC to GNU compiler

I am working on porting code from KEIL(ARMCC) to Eclipse(with GNU ARM toolchain). The controller is LPC2468(ARM7TDMI-S) with the following memory available:

  FLASH (rx) : ORIGIN = 0x00, LENGTH = 0x80000
  RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x10000 /* 96K */
  ERAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 0x200000

They are multiple memory mappings along with RAM/ROM distributed into different sections in the Keil's scatter file as mentioned below:

KEIL Scatter file:

LOAD_BOO 0x00000000 NOCOMPRESS 0x00001000 
{
    EXEC_BOO 0x00000000 ZEROPAD 0x00001000
    {
        lpc2400.o(RESET, +FIRST)
        lpc2400.o (.text)
        __main.o (+CODE, +RO)
        __scatter.o (+CODE)
        __scatter_copy.o (+CODE)
        __scatter_zi.o (+CODE)
        libinit.o (+CODE, +RO)
        libinit2.o (+CODE, +RO)
        libshutdown.o (+CODE)
        libshutdown2.o (+CODE)
        rtentry.o (+CODE)
        rtentry2.o (+CODE)
        rtentry4.o (+CODE)
        rtexit.o (+CODE)
        rtexit2.o (+CODE)
        libspace.o (.text)
        heapauxi.o (.text)
        sys_stackheap_outer.o (.text)
        fpinit.o (x$fpl$fpinit)
        rt_fp_status_addr_intlibspace.o (.text)
        exit.o (.text)
        sys_exit.o (.text)
        use_no_semi.o (.text)
        anon$$obj.o(Region$$Table)
        *(CODE_BOOcode)
    }
    ONCHIP_BOO 0x40000000 ZEROPAD 0x00001000
    {
        *(STACK)
        *(HEAP)
        libspace.o (.bss)
    }
}

LOAD_YE 0x00001000 NOCOMPRESS 0x00001000 
{
    EXEC_YE 0x40001000 ZEROPAD 0x00001000
    {
        *(CODE_YEcode
    }
    ONCHIP_YE 0x40005000 ZEROPAD 0x00000700
    {
        *(ZI_YEzi)
    }
}

LOAD_GR 0x00002000 NOCOMPRESS 0x00001000 
{
    EXEC_GRE 0x40002000 ZEROPAD 0x00001000
    {
        *(CODE_GRcode)
    }
    ONCHIP_GRE 0x40005800 ZEROPAD 0x00000800
    {
        *(ZI_GRzi, +FIRST)
        *(RW_GRrw)
    }
}

LOAD_FL 0x00003000 NOCOMPRESS 0x00002000 
{
    EXEC_FL 0x40003000 ZEROPAD 0x00002000
    {
        *(CODE_FLcode)
    }
    ONCHIP_FL 0x40006000 ZEROPAD 0x00000200
    {
        .ANY (RW_FLrw, ZI_FLzi)
    }
}

LOAD_MA 0x00005000 NOCOMPRESS 0x0000B000
{
    EXEC_MA 0x00005000 ZEROPAD 0x0000B000
    {
        *(CODE_SYSTEMcode, +FIRST)
        *(.text)
        *(CODE_MAcode)
    }
    OFFCHIP_MA 0xA0000000 ZEROPAD 0x00002000
    {
        *(RW_MArw)
        *(RO_MAro)
        *(ZI_MAzi)  
    }
}


LOAD_BOUNDARY 0x00010000 NOCOMPRESS 0x00000010 
{
    EXEC_BOUNDARY0x00010000 ZEROPAD 0x00000010
    { 
        *(RW_BOUNDARYrw)
    }
}

LOAD_MATO 0x00010010 NOCOMPRESS 0x00020000 
{
    EXEC_MATO 0x00010010 ZEROPAD 0x00020000
    {   
        *(CODE_MATOcode)
    }
    OFFCHIP_MATO 0xA0008000 ZEROPAD 0x00004000
    {
        *(RW_MATOrw)
        *(RO_MATOro)
        *(ZI_MATOzi)
    }
}

END_ROM +0 0x24 
{
    ER_END_ROM  +0
    {
        *(EOF_SIGN, +LAST)
    }
}

I am able to do whole memory mapping with undistributed RAM and ROM memory regions as follows.

GNU Linker Script file:

ENTRY(Reset_Handler)

MEMORY
{
  FLASH (rx) : ORIGIN = 0x00, LENGTH = 0x80000
  RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x10000 /* 96K */
  ERAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 0x100000
}



SECTIONS
{
  .text :
  {
    *(.isr_vector)
    *(.text)
    *(.rodata)
    . = ALIGN(4);
  }> FLASH
  
  .data :
  {
    _la_data = LOADADDR(.data);
        _sdata = .;
    *(.data)
    . = ALIGN(4);
    _edata = .;
  }> RAM AT> FLASH
  
  .bss (NOLOAD) :
   {
        _sbss = . ;
        *(.bss)
        *(COMMON)
        _ebss = . ;
  }> ERAM
}

Snippet from GNU Startup file performing ROM to RAM Copy:

//Relocate the .data section

                LDR     r0, =_la_data
                LDR     r1, =_sdata
                LDR     r2, =_edata

           1:
                CMP     r1,r2
                LDMLTIA r0!, {r3}
                STMLTIA r1!, {r3}
                BLT     1b

//Clear the .bss section

                LDR     r1, =_sbss
                LDR     r2, =_ebss
                MOV     r3, #0

           1:
                CMP     r1,r2
                STMLTIA r1!, {r3}
                BLT     1b

But my requirement is to do memory mapping the same as done in Keil (scatter file snippet mentioned at the top) but I am facing challenges like how to do ROM to RAM copy for different memory sections, how to map individual files CODE, RW, RO and BSS data to distributed memory regions.