PWM Missing interrupts on 5121 GPT peripherical

I am trying to operate a custom Linux driver for the MCP5121 GPT peripherical unit working as a PWM. The driver settles an interrupt service with the intention to reload a new duty cycle with every hit.

I have checked that the GPT interrupt vector is properly installed and serviced using the IPIC force interrupt register SIFCR(0x50).

I run a relatively old Linux kernel and the pwm device driver model is not available. So, the pwm software usability interface is assembled with write system calls. A parameter of 32 bits encodes the window time, the period and the duty cycle/1000.

With below testing values, the driver settles the involved registers as the following, we run with the IPS clocking to 66Mhz(15ns):

# echo 0xff0fffff >/dev/mpc5121-pwm
mpc5121-pwm( pwm_open)
mpc5121-pwm( pwm_write)
Mode (0x010) : 0x00000103( 0b0000000100000011 )
pwm.command 0xff0fffff vs 0xff0fffff : Scheduling(4)
Single Shot of 6200(msec) 65104(Hz) duty 783/1000, 15 nsec/tick
PWMOffset (0x018) : duty/1000 783 encoded as 0x03210000: 12015(nsec)
Counter (0x014) : Freq 65104(Hz) encoded as 0x00010400: 15360(nsec)

The Mode(0x010) GPT register valued like this, should enable the interrupt generation with the bit INTEN toggled and the TIMER_MS field valued as PWM(0x03) operation valued

After some ticks on the the Linux shell through the read driver call I see the following:

# cat /dev/mpc5121-pwm
mpc5121-pwm( pwm_open)
mpc5121-pwm( pwm_read)
Deadline of 6200 msec vs measurement of 0 -> missed (overrun 0)
Mode (0x010) : 0x00000103( 0b0000000100000011 )
Counter (0x014) : 0x00010400
PWM (0x018) : 0x03210000
Status (0x01c) : 0x00006004

IPIC
SIPNR_H (0x008) : 0x00000000
SIMSR_H (0x020) : 0x008011f9
SIPRR_D (0x1ca) : 0x70105770

# cat /dev/mpc5121-pwm
mpc5121-pwm( pwm_open)
mpc5121-pwm( pwm_read)
Deadline of 6200 msec vs measurement of 0 -> missed (overrun 0)
Mode (0x010) : 0x00000103( 0b0000000100000011 )
Counter (0x014) : 0x00010400
PWM (0x018) : 0x03210000
Status (0x01c) : 0x00002004

IPIC
SIPNR_H (0x008) : 0x00000000
SIMSR_H (0x020) : 0x008011f9
SIPRR_D (0x1ca) : 0x70105770

# cat /dev/mpc5121-pwm
mpc5121-pwm( pwm_open)
mpc5121-pwm( pwm_read)
Deadline of 6200 msec vs measurement of 0 -> missed (overrun 0)
Mode (0x010) : 0x00000103( 0b0000000100000011 )
Counter (0x014) : 0x00010400
PWM (0x018) : 0x03210000
Status (0x01c) : 0x00001004

IPIC
SIPNR_H (0x008) : 0x00000000
SIMSR_H (0x020) : 0x008011f9
SIPRR_D (0x1ca) : 0x70105770

The registers value seem stable on the PWM specifications and the timer operative. However, the weird thing is that the GPT unit is not interrupting the CPU and obviously the ISR is not threaded under the PWM behaviour.

I have checked as well the interrupt flow using the pure Timer operation with not IO hardware involved TIMER_MS(0b1xx). The PWM modality seems on going, the overflow fields on the Status(0x01c) are moving over its dynamic range of 0 to 7 (3bits).

Should I check other SOC parts? Where can I view some real example code about this particular operation mode?