A series of problems when setting CR0_PGbit

1

My native language is not English. Please forgive me if I offend you or make mistakes in wording

The Qemu screen is twinkle When I try to setup CR0_PG bit to enable memory paging function And The PF flags is up

I open GDB to view the valve of EIP ,It's very big(Beacuse I open the memory paging function?) and stay in a valve (always 0x1ffae540 [Is that a linear address?])

In the last It go back to a Physics address(always 0xf0090) Again (BUT THE PF bit IS STILL UP??!!)

Although the EIP value does not change, but the value of the register is constantly changing, which is very strange

Maybe the section reg is doesn't work now ?

    gdb) target remote :1234
    Remote debugging using :1234
    0x0000fff0 in ?? ()
    (gdb) i r                                                                                                   
    eax            0x0      0
    ecx            0x0      0
    edx            0x663    1635
    ebx            0x0      0
    esp            0x0      0x0
    ebp            0x0      0x0
    esi            0x0      0
    edi            0x0      0
    eip            0xfff0   0xfff0
    eflags         0x2      [ ]
    cs             0xf000   61440
    ss             0x0      0
    ds             0x0      0
    es             0x0      0
    fs             0x0      0
    gs             0x0      0
    (gdb) c   
    Continuing.

    > The Qemu screen is twinkle now
    CTRL C                                                                                
    Program received signal SIGINT, Interrupt.
    0x1ffb0f02 in ?? ()
    (gdb) i r
    eax            0x6df2   28146
    ecx            0x0      0
    edx            0x0      0
    ebx            0x1ffae540       536536384
    esp            0x6dd8   0x6dd8
    ebp            0xf5604  0xf5604
    esi            0xbb8    3000
    edi            0xf5610  1005072
    eip            0x1ffb0f02       0x1ffb0f02      ;Remerber this Valve (It's A linear Address) 
    eflags         0x46     [ PF ZF ]        The PF is open                                               
    cs             0x8      8
    ss             0x10     16
    ds             0x10     16
    es             0x10     16
    fs             0x10     16
    gs             0x10     16
    (gdb) c
    Continuing.
    ^C
    Program received signal SIGINT, Interrupt.
    0x1ffb0b12 in ?? ()
    (gdb) i r
    eax            0x24     36
    ecx            0x1694   5780
    edx            0x511    1297
    ebx            0x2400   9216
    esp            0x6ab4   0x6ab4
    ebp            0x6e10   0x6e10
    esi            0x1ffaec00       536538112
    edi            0xcb56c  832876
    eip            0x1ffb0b12       0x1ffb0b12 ;The eip looks like stopped (Still Linear Address)
    eflags         0x46     [ PF ZF ]
    cs             0x8      8
    ss             0x10     16
    ds             0x10     16
    es             0x10     16
    fs             0x10     16
    gs             0x10     16
    (gdb) c
    Continuing.
    ^C
    Program received signal SIGINT, Interrupt.
    0x000f0090 in ?? ()
    (gdb) i r
    eax            0x7000   28672
    ecx            0x7c417  508951
    edx            0x0      0
    ebx            0x0      0
    esp            0x6df4   0x6df4
    ebp            0xf58a9  0xf58a9
    esi            0xf6840  1009728 
    edi            0x6      6
    eip            0xf0090  0xf0090     ;Wait,It's Physics Again [

I can confirm that this is the physical address of JMP $, but the linear 

address above is not sure

]
    eflags         0x6      [ PF ]
    cs             0x8      8
    ss             0x10     16
    ds             0x10     16
    es             0x10     16
    fs             0x10     16
    gs             0x10     16
    (gdb) 
    qemu log:

    root@ubuntuVM:/home/alan/osdev# make drun  ; 
    @@@@@@@@@@@@@@@@@@@@@@@@
    drun:boot.img
        make
        qemu-system-x86_64 -m 512  -s -S -hda ./boot.img
    @@@@@@@@@@@@@@@@@@@@@


    make
    make[1]: Entering directory '/home/alan/osdev'
    nasm ./asm/boot.asm -o ./opt1.bin
    nasm ./asm/loader.asm -o ./opt2.bin
    cat ./opt1.bin ./opt2.bin > ./boot.img
    make[1]: Leaving directory '/home/alan/osdev'
    qemu-system-x86_64 -m 512  -s -S -hda ./boot.img
    WARNING: Image format was not specified for './boot.img' and probing guessed raw.
     Automatically detecting the format is dangerous for raw images, write operations on block 0 will be restricted.
    Specify the 'raw' format explicitly to remove the restrictions.
warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]

MCVE

nasm YourFileName.asm -o opt.bin && qemu-system-x86_64 -m 512 -hda ./opt.bin
org 0x7e00
jmp Epm32
;=================INTO P32
;========GTD32
x32GDT: dd 0,0
x32GDTC32:  dd 0x0000ffff,0x00cf9a00
x32GDTD32:  dd 0x0000ffff,0x00cf9200

x32GDTL equ $ - x32GDT
x32GDTR dw x32GDTL - 1
        dd x32GDT

x32SC32 equ x32GDTC32 - x32GDT
x32SD32 equ x32GDTD32 - x32GDT
;=======IDT32
x32IDT: 
    times 0x50 dq 0
x32IDTE:

x32IDTR:
    dw x32IDTE - x32IDT - 1 
    dd x32IDT


Epm32:

;Open A20
mov ax,2401
int 0x15
cli

;Load GDT
db 0x66
lgdt [x32GDTR]

;Load IDT (disable)
;db 0x66
;lidt [x32IDTR]
;Set CR0_PE


mov eax,cr0
or eax,1
mov cr0,eax
jmp Epl64


;========GTD64
x64GDT:     dq 0x0000000000000000
x64GDTC64:  dq 0x0020980000000000
x64GDTD64:  dq 0x0000920000000000

x64GDTL: equ $ - x64GDT
x64GDTR: dw x64GDTL -1
         dd x64GDT

x64SC64 equ x64GDTC64 - x64GDT
x64SD64 equ x64GDTD64 - x64GDT
;========PT64   page  table
x64PT64:       
    dd 0x091007
    dd 0x000000
    dd 0x091007
    dd 0x000000

    times 0x7f8 db 0x00

    dd 0x092007
    dd 0x000000

    times 0xff8 db 0x00

    dd 0x000083
    dd 0x000000
    dd 0x200083
    dd 0x000000
    dd 0x400083
    dd 0x000000
    dd 0x600083
    dd 0x000000
    dd 0x800083
    dd 0x000000
    dd 0xa00083
    dd 0x000000


Epl64:

    ;Load GDT
    db 0x66
    lgdt [x64GDTR]

    ;Reset Section REG
    mov ax,0x10
    mov ds,ax
    mov es,ax
    mov fs,ax
    mov gs,ax
    mov ss,ax

    ;Reset Section ptr
    mov esp,0x7e00

    ;Set CR4_PAE
    mov eax,cr4
    bts eax,5
    mov cr4,eax

    ;Set CR3
    mov eax,x64PT64
    mov cr3,eax

    ;Set EFER_LME
    mov ecx,0x0c0000080
    rdmsr
    bts eax,8
    wrmsr

    ;Set CR0_PE_PG
    mov eax,cr0
    bts eax,0
    bts eax,31
    mov cr0,eax

    jmp $


assembly
x86
x86-64
nasm
osdev
asked on Stack Overflow Jul 26, 2020 by AlanCui • edited Jul 26, 2020 by Michael Petch

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