RISC-V: Do 12-bit immediate logical operations operate on the whole register?

I am trying to write a simulator for a RISC-V CPU and can not find a definitve answer to my question.

Let's say I want to use

ANDI rs1, rd, 0xFFF 

with rs1 containing 0xFFFFFFFF and the immediate value being 0xFFF.

Does the ANDI operate on the full register and just fill the remaining 20 bit of the immediate with zeros so the result in rd will be 0x000000FFF?

Or are the higher 20 bits ignored and the result in rd will still be 0xFFFFFFFF?

Same question for XORI and ORI commands.

The Immediate value is sign extended, 12 bit FFF will translate to 32'hFFFFF_FFF for RV32

so the values being AND-ed will be

rs1_data & 0xFFFFF_FFF