Can't assign a list of file names to a variable in GNU-make

First post here, not native english speaker, glad to post and help others!

I'm having a problem using make to compile an avr-gcc project for me. More specifically in assigning a list of *.c source files of different directories, (subdirectories in my case), to a variable in make, where it will be used to generate dependencies.

Using This method i found, Renaud Pacalet uses this syntax:

SRC = $(shell find src/ -name "*.cpp")

Using the find command in my case looks like this:

SOURCE_FILES = $(shell find -name '*.c')

And the result is (on cmd):

C:\AVR_projetos\Balizar_reserva>find -name '*.c'
./main.c
./modules/i2c/i2c.c
./modules/rom/rom.c

But, when make invokes shell to perform the script, the variable only holds the first filename in the sequence.

So far i tried:

• Using $(wildcard *.c) function, same problem
• Using $(shell echo *.c), same problem
• Using the additional arguments -print0 to -find to force a in-line output, still nothing
• Using $(shell find (path) -name '*.c') using an absolute path to the main directory, a relative ../, and all in combination with the additional arguments

Also, I've referred to these two manual pages:

• Shell function
• Wildcard function

Both of them explain in a simple way that this is possible, I do the same thing and get nothing.

• This is my file directory: Image

• And my make file (it's all over the place because I was trying to implement this): Paste bin

For the record, i had a problem before having this problem:

avr-gcc -MM main.c > depend.d
  0 [main] sh 14484 sync_with_child: child 15780(0x1DC) died before initialization with status code 0xC0000142
158 [main] sh 14484 sync_with_child: *** child state waiting for longjmp
/usr/bin/sh: fork: Resource temporarily unavailable make: *** [depend] Error 128

For which i found This fix that seens to work.

• Os: Windows 10 professional 1903 comp. 18362.535

• GNU-make: 3.81

Welcome to SO, as You mentioned you refer to wildcard function, but description says:

One use of the wildcard function is to get a list of all the C source files in a directory, like this: $(wildcard *.c).

Then I think when you executed Make, main.c compiled?

You need to improve your wildcard to search for subdirectories or manualy add them. Look at this answer and question.