How would you go about comprehending hlsl bytecode like this?

I was using NVIDIA Nsight to view debugged shader code. I tried to use sources online saying what each part of the code below does, like https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-sm4-asm, but I just can't comprehend what the heck is going on and how it would look as actual shader code. Could someone please give me a general rundown of what this code is doing and it's relation to normal shader code, along with how to comprehend other ones in the future?

Code (from NVIDIA Nsight):

//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// TANGENT                  0   xyzw        1     NONE   float       
// NORMAL                   0   xyz         2     NONE   float   xyz 
// TEXCOORD                 0   xyzw        3     NONE   float   xy  
// TEXCOORD                 1   xyzw        4     NONE   float       
// TEXCOORD                 2   xyzw        5     NONE   float       
// TEXCOORD                 3   xyzw        6     NONE   float       
// COLOR                    0   xyzw        7     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xy          1     NONE   float   xy  
// TEXCOORD                 1   xyz         2     NONE   float   xyz 
// TEXCOORD                 2   xyz         3     NONE   float   xyz 
// COLOR                    0   xyzw        4     NONE   float   xyzw
// TEXCOORD                 3   xyzw        5     NONE   float   xyzw
//
0x00000000: vs_4_0
0x00000008: dcl_constantbuffer CB0[16], immediateIndexed
0x00000018: dcl_constantbuffer CB1[7], immediateIndexed
0x00000028: dcl_constantbuffer CB2[21], immediateIndexed
0x00000038: dcl_input v0.xyzw
0x00000044: dcl_input v2.xyz
0x00000050: dcl_input v3.xy
0x0000005C: dcl_input v7.xyzw
0x00000068: dcl_output_siv o0.xyzw, position
0x00000078: dcl_output o1.xy
0x00000084: dcl_output o2.xyz
0x00000090: dcl_output o3.xyz
0x0000009C: dcl_output o4.xyzw
0x000000A8: dcl_output o5.xyzw
0x000000B4: dcl_temps 3
0x000000BC: add r0.x, cb0[13].y, l(-0.062500)
0x000000DC: mul r0.x, r0.x, cb0[13].z
0x000000FC: mul r0.x, r0.x, l(0.500000)
0x00000118: add r0.y, -cb0[13].z, l(1.000000)
0x0000013C: mad r0.x, v0.y, r0.y, r0.x
0x00000160: mul r0.xyzw, r0.xxxx, cb1[1].xyzw
0x00000180: mad r0.xyzw, cb1[0].xyzw, v0.xxxx, r0.xyzw
0x000001A8: mad r0.xyzw, cb1[2].xyzw, v0.zzzz, r0.xyzw
0x000001D0: add r1.xyzw, r0.xyzw, cb1[3].xyzw
0x000001F0: mad r0.xyzw, cb1[3].xyzw, v0.wwww, r0.xyzw
0x00000218: mul r2.xyzw, r1.yyyy, cb2[18].xyzw
0x00000238: mad r2.xyzw, cb2[17].xyzw, r1.xxxx, r2.xyzw
0x00000260: mad r2.xyzw, cb2[19].xyzw, r1.zzzz, r2.xyzw
0x00000288: mad o0.xyzw, cb2[20].xyzw, r1.wwww, r2.xyzw
0x000002B0: mad o1.xy, v3.xyxx, cb0[15].xyxx, cb0[15].zwzz
0x000002DC: dp3 r1.x, v2.xyzx, cb1[4].xyzx
0x000002FC: dp3 r1.y, v2.xyzx, cb1[5].xyzx
0x0000031C: dp3 r1.z, v2.xyzx, cb1[6].xyzx
0x0000033C: dp3 r1.w, r1.xyzx, r1.xyzx
0x00000358: rsq r1.w, r1.w
0x0000036C: mul o2.xyz, r1.wwww, r1.xyzx
0x00000388: mov o3.xyz, r0.xyzx
0x0000039C: mov o5.xyzw, r0.xyzw
0x000003B0: mov o4.xyzw, v7.xyzw
0x000003C4: ret 
// Approximately 0 instruction slots used