I'm having problem understanding this exercise. I'll try my best to give my reasoning and I hope you guys can give me an idea what each line of code demonstrates. The Assembly we use is x86 assume the value stored in %rax = x
xorq %rax, %rax // value stored in %rax: x ^ x = 0 addq $-1, %rax // value stored in %rax: 0 - 1 = -1 movq %rax, %rbx // value stored in %rbx: -1 or 0xFFFFFFFF shlq $2, %rbx shrq $1, %rbx // left shift by 3 total, so value stored in %rbx: 0x7fffffff8 addq %rbx, %rax // value stored in %rax: 0x7fffffff9
For the last line, my professor says we actually computing (TMax-1)-1, which I really don't get.
The question is:
Assuming the addq from Q3.2 did execute, say we now executed the following instruction:
What value (in hex, including the prefix) is now stored in %rbx?
I really don't understand what setg means (I did read the specification but at a lost). Thanks a lot for helping !
Note you have two left shifts and one right, so that's not 3 left in total. Also you are using 64 bit registers so the value in
rbx before the
setg is actually
0x7ffffffffffffffe. The instruction set reference entry for
setg says result is
ZF=0 and SF=OF. Well, the result of the addition is
0x7ffffffffffffffd and that is not
SF being the sign bit is zero, and
OF being signed overflow is zero too. Hence the condition holds, so
bl will be
1 but the rest of
rbx is unchanged giving you
Adding RBX to RAX calculates RBX - 1, because RAX still = -1.
TMax - 1 means
INT64_MAX - 1.
Two left shifts and one right gives you a number with the high bit cleared (non-negative) and the low bit cleared. The max positive (2's complement) integer is all bits set except the sign bit, and this is one less than that.
Jester explained how
setg works based on EFLAGS set by
add. Look up
setcc in the manual.
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