understanding the addressing offset in ASM

im coming from this question

the second answer has the following code:

> arm-none-eabi-gcc -march=armv6-m \
                    -mcpu=cortex-m0 \
                    -mthumb \
                    -Os \
                    -c \
                    -o test.o \
                    test.c

> arm-none-eabi-objdump -dr test.o

00000000 <queue_empty>:
 0: 4b03     ldr   r3, [pc, #12]   ; (10 <queue_empty+0x10>)
 2: 6818     ldr   r0, [r3, #0]
 4: 685b     ldr   r3, [r3, #4]
 6: 1ac0     subs  r0, r0, r3
 8: 4243     negs  r3, r0
 a: 4158     adcs  r0, r3
 c: 4770     bx    lr
 e: 46c0     nop                   ; (mov r8, r8)
10: 00000000 .word 0x00000000
             10: R_ARM_ABS32 .bss

> arm-none-eabi-nm -S test.o

00000000 00000004 b head
00000000 00000014 T queue_empty
00000004 00000004 b tail

Q1:

the first instruction is ldr r3, [pc, #12]

pc register is program counter should have the next instruction address which is (0x2) + offset #12

this will be #14 or 0xE ...

how its commented to be 0x10 ?

Q2: we are loading the value from memory address () to R3 which i can see here : 10: 00000000 .word 0x00000000 is equal to 0. R3 = 0.

then we load the value in address in R3 (which is 0x0). isnt that : same address of the function it self?

0: 4b03 ldr r3, [pc, #12] ; (10 <queue_empty+0x10>)
-^ this address 0

Q3: wouldn't it be faster and smaller code to load data directly because this bss section are already in small memory values already right?

1. The pc is two steps ahead of the current instruction execution (hence 4, not 2)
2. The value 0 gets replaced at link time. It's probably a global variable defined in a different file. (pointer to a structure)
3. see 2