How to include .h with makefile in linux?

I am writing software for ARM microcontrollers in C using linux and I'm not using an IDE. The reason for this is to learn how really low level stuff works. Now I want to include a .h file that has a corresponding .c file, in my main.c program the "usual way" by writing #include "timer.h". This of course requires me to somehow change the Makefile and or linkerscript!?

How can I do this?

Right now the file timer.h is included, but directly in the Makefile like this:

LD=arm-none-eabi-gcc
OBJCOPY=arm-none-eabi-objcopy

CFLAGS=-mcpu=cortex-m3 -mthumb -g -std=c99 -Wall
LDFLAGS=-mcpu=cortex-m3 -mthumb -g -lgcc -lc -lcs3 -lcs3unhosted -lefm32gg -Llib
ASFLAGS=-mcpu=cortex-m3 -mthumb -g
LINKERSCRIPT=lib/efm32gg.ld

polling.bin : polling.elf
    ${OBJCOPY} -O binary $< $@

polling.elf : polling.o timer.o dac.o gpio.o interrupt_handlers.o
    ${LD} -T ${LINKERSCRIPT} $^ -o $@ ${LDFLAGS} 

%.o : %.c
    ${CC} ${CFLAGS} -c $< -o $@

.PHONY : pretty
pretty :
    -indent *.c *.h

.PHONY : upload
upload :
    -eACommander.sh -r --address 0x00000000 -f "polling.bin" -r

.PHONY : clean
clean :
    -rm -rf *.o *.elf *.bin *.hex