Putting core 0 in non-secure world


I am using a custom board, having zynq-7000. I am running two application on both cores. I want to put cpu0 in non-secure world and cpu1 in secure world. As Cpu1 is already in secure world, I am trying to make Cpu0 in non-secure world.

I am trying to put cpu0 in normal-world and I add following lines in fsbl.

__asm__ (
    "MRC     p15, 0, r0, c1, c1, 0;"
    "ORR     r0,  r0, #0x1;"
    "MCR     p15, 0, r0, c1, c1, 0;"

But unfortunately, my system hangs, and some time gives “DATA_ABORT_HANDLER FSBL Status = 0xA304”. I have added these lines (assembly instruction) in fsbl and tried it as a patch to u-boot(if i boot linux instead of baremetal app).

I have also set bits in TZ registers to be unsecure for testing.

Xil_Out32( TZ_OCM_RAM0, 0xffffffff);
Xil_Out32( TZ_OCM_RAM1, 0xffffffff);
Xil_Out32( TZ_OCM, 0xffffffff);
Xil_Out32( TZ_DDR_RAM, 0x0000ffff);

Can someone tell me where to go from here?


asked on Stack Overflow Sep 19, 2019 by Khurram • edited Sep 20, 2019 by artless noise

1 Answer


I think you need to modify ARM Trusted Firmware to do that.

answered on Stack Overflow Sep 19, 2019 by user12091136

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