MEMORY
{
RAM (rxai!w) : ORIGIN = 0x80000000 LENGTH = 34K
}
Lets say I have a section in linker script like above. can i have a define for 0x80000000 and 34K. I want it to look like,
MEMORY
{
RAM (rxai!w) : ORIGIN = RAM_ORIGIN LENGTH = RAM_LENGTH
}
So my question how to put this define in linker script? I have a script that auto generates the linker script and the defines will be different every time.
I figured that having the defines a different file like common.ld in the following format,
RAM_ORIGIN = 0x80000000;
RAM_LENGTH = 34K;
works. But this common.ld could not be included directly in the linker script using 'INCLUDE'. If i pass it in the command line as -Wl,common.ld then it works.
I have solved this using the C preprocessor cpp
.
My linker scripts contain 'variables' that can be 'filled' from the Makefile invoking cpp
for the actuals:
LDCSRC=script.lk.in
LDCDILE=script.lk
$(LDCFILE): $(LDCSRC)
$(Q)echo CPP $<
$(Q)$(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $$< -o $$@
the linker script itself can then be 'beefed up' with cpp
macros as well:
#ifdef COMPILE_RAM
#define ROMFLAGS WX
#else
#define ROMFLAGS RX
#endif /* COMPILE_RAM */
MEMORY
{
_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
In this example, the linker script even #include
s a C header file (not shown) to define TARGET_ADDRESS
to ensure we have the same definition in the code and in the linker script. You just need to make sure this *.h file does not contain statements that disturb the linker (should only contain preprocessor definitions).
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