When is Overflow flag set?

Can anybody explain why the overflow flag is set here? I learned that it is set if you add to positives and get a negative or subtract to negatives and get a positive!

    LDR     r0,=0X80000000
    LDR     r1,=0X40000000

    SUBS        r7,r10,r0

0x8 - 0x4 should be more than enough to see this

0x8 - 0x4 = 0x8 + (0x4)

     1
  1000
+ 1011
=======

complete the math

 10111
  1000
+ 1011
=======
  0100

carry in and carry out of the msbit are not the same so signed overflow (V) is set.

And yes you can tell from the sign bits if you look at the truth table for the msbit adder.

EDIT -----

Ahh assuming that is an r1 not an r10 then

0x4 - 0x8

  01111
   0100
+  0111
========
   1100

overflow as well.