Some questions about flash_header.S in imx6q uboot

The following code is excerpted from: uboot 2009 source board/Freescale/mx6q_sabreauto/flash_header.S

#include <config.h>
#include <asm/arch/mx6.h>

#ifdef CONFIG_FLASH_HEADER
#ifndef CONFIG_FLASH_HEADER_OFFSET
# error "Must define the offset of flash header"
#endif

#define CPU_2_BE_32(l) \
((((l) & 0x000000FF) << 24) | \
(((l) & 0x0000FF00) << 8) | \
(((l) & 0x00FF0000) >> 8) | \
(((l) & 0xFF000000) >> 24))

#define MXC_DCD_ITEM(i, addr, val) \
dcd_node_##i: \
.word CPU_2_BE_32(addr) ; \
.word CPU_2_BE_32(val) ; \

.section ".text.flasheader", "x"
b _start
.org CONFIG_FLASH_HEADER_OFFSET

ivt_header: .word 0x402000D1 /* Tag=0xD1, Len=0x0020, Ver=0x40 */
app_code_jump_v: .word _start
reserv1: .word 0x0
dcd_ptr: .word dcd_hdr
boot_data_ptr: .word boot_data
self_ptr: .word ivt_header
app_code_csf: .word 0x0
reserv2: .word 0x0

boot_data: .word TEXT_BASE
image_len: .word _end_of_copy - TEXT_BASE + CONFIG_FLASH_HEADER_OFFSET
plugin: .word 0x0

dcd_hdr: .word 0x40D802D2 /* Tag=0xD2, Len=90*8 + 4 + 4, Ver=0x40 */
write_dcd_cmd: .word 0x04D402CC /* Tag=0xCC, Len=90*8 + 4, Param=0x04 */

#include <config.h>
#include <asm/arch/mx6.h>

#ifdef CONFIG_FLASH_HEADER
#ifndef CONFIG_FLASH_HEADER_OFFSET
# error "Must define the offset of flash header"
#endif

#define CPU_2_BE_32(l) \
((((l) & 0x000000FF) << 24) | \
(((l) & 0x0000FF00) << 8) | \
(((l) & 0x00FF0000) >> 8) | \
(((l) & 0xFF000000) >> 24))

#define MXC_DCD_ITEM(i, addr, val) \
dcd_node_##i: \
.word CPU_2_BE_32(addr) ; \
.word CPU_2_BE_32(val) ; \

.section ".text.flasheader", "x"
**b _start
.org CONFIG_FLASH_HEADER_OFFSET**

ivt_header: .word 0x402000D1 /* Tag=0xD1, Len=0x0020, Ver=0x40 */
app_code_jump_v: .word _start
reserv1: .word 0x0
dcd_ptr: .word dcd_hdr
boot_data_ptr: .word boot_data
self_ptr: .word ivt_header
app_code_csf: .word 0x0
reserv2: .word 0x0

boot_data: .word TEXT_BASE
image_len: .word _end_of_copy - TEXT_BASE + CONFIG_FLASH_HEADER_OFFSET
plugin: .word 0x0

dcd_hdr: .word 0x40D802D2 /* Tag=0xD2, Len=90*8 + 4 + 4, Ver=0x40 */
write_dcd_cmd: .word 0x04D402CC /* Tag=0xCC, Len=90*8 + 4, Param=0x04 */

My question is what is the meaning of

b _start
.org CONFIG_FLASH_HEADER_OFFSET

above code.

Specifically, since IMX6Q specifies the offset of IVT in different boot devices, for example, my application scenario is sd, and the offset address is 0x400 (1K), then my uboot image can be exactly as follows: IVT+uboot The format is built so that when you use the mfg tool to burn the uboot image, you can use the following command:

write U-Boot to sd card

Instead of the default command (skipping 0x400 bytes before uboot.bin):

write U-Boot to sd card

Look at this, then 0x400 bytes in front of flash_header.S is not redundant, or is there any special use, if you directly write this uboot.bin to emmc 0x400 (do not skip ucode.bin before 0x400 Bytes, ie b _start, .org CONFIG_FLASH_HEADER_OFFSET), is that directly adjusted to the _start function to start execution, and will not be DCD related configuration?

Another problem is I have taken this flash_header.S and tried to port in 2017.03 uboot to create uboot.bin, while using gpt partition table(that is used by mfg tools or fsl-sdcard-partition.sh) my gpt+ivt+uboot.bin is not coming at correct offsets,

00000000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
000001c0 01 00 ee fe ff ff 01 00 00 00 ff af e2 0e 00 00 |................|
000001d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
000001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.|
00000200 45 46 49 20 50 41 52 54 00 00 01 00 5c 00 00 00 |EFI PART....\...|
00000210 ff 8a 6c dd 00 00 00 00 01 00 00 00 00 00 00 00 |..l.............|
00000220 ff af e2 0e 00 00 00 00 22 00 00 00 00 00 00 00 |........".......|
00000230 de af e2 0e 00 00 00 00 8b 43 02 05 72 4d ed 4a |.........C..rM.J|
00000240 be 85 17 f1 e3 69 c2 32 02 00 00 00 00 00 00 00 |.....i.2........|
00000250 80 00 00 00 80 00 00 00 86 d2 54 ab 00 00 00 00 |..........T.....|
00000260 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00000400 36 07 00 ea 00 00 00 00 00 00 00 00 00 00 00 00 |6...............| ---------> b _start at 1KiB
00000410 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00000800 d1 00 20 40 58 74 90 00 00 00 00 00 00 00 00 00 |.. @Xt..........| ---------------> ivt header at 2KiB

and board can't boot up.