An address for an ISR shown in the GCC map is 0x00001328.
.text.USART0_RX_IRQHandler
0x00001328 0xe4 ./Source/interrupts_new.o
0x00001328 USART0_RX_IRQHandler
However, the value actually loaded into the ISR vector at 0x0000006C is 0x00001329.
0x00000060 000012ED 00001301 00001315 00001329 í...........)...
This is the first time I've noticed this (or even looked). Is the ok ? Is this an alignment issue, or a Thumb issue ?
Thanks.
It shows the uC that the ISR uses the THUMB instruction set.
Even addresses - ARM, odd - THUMB.
Everything is correct
The actual routine is at the addr & 0xffffff0c address - ie with the last two bits zeroed.
User contributions licensed under CC BY-SA 3.0