understand the operation of LB MIPS

LB MIPS operation : link : http://www.ece.cmu.edu/~ece447/s13/lib/exe/fetch.php?media=mips_r4000_users_manual.pdf Page 549

32 vAddr ← ((offset15)16 || offset15...0) + GPR[base]
(pAddr, uncached) ← AddressTranslation (vAddr, DATA)
 pAddr ← pAddrPSIZE – 1 ... 3 || (pAddr2...0 xor ReverseEndian3)
 mem ← LoadMemory (uncached, BYTE, pAddr, vAddr, DATA)
 byte ← vAddr2...0 xor BigEndianCPU3
 GPR[rt] ← (mem7+8*byte)24 || mem7+8*byte...8*byte

Below is the c code :

//Defines for easier readability of registers
#define OPCODE ((curr_instr >> 26) & 0x3F) 
#define OPCODE_SPECIAL (curr_instr & 0x3F) 
#define OPCODE_REGIMM ((curr_instr >> 16) & 0x3F) 

#define SIGNEXD(val) ((val & 0x8000) ? ((val) | 0xFFFF0000 ) \
                                            : ((val) & 0x0000FFFF))
#define TARGET (SIGNEXD(curr_instr)<<2)
#define RS ((curr_instr>>21) & 0x1F)
#define RT ((curr_instr>>16) & 0x1F)
#define RD ((curr_instr>>11) & 0x1F)

 void lb()
 {
  uint32_t addr = CURRENT_STATE.REGS[RS] + SIGNEXD(curr_instr);
  uint32_t mem = mem_read_32(addr - (addr&0x3));

  mem = (mem >> ((addr & 0x3)*8));
  NEXT_STATE.REGS[RT] = (mem & 0x80) ? (mem | 0xFFFFFF00) : (mem & 0xFF);
  //NOTE: Exceptions ignored
  }

I don't understand why the operation of LB is coded as above ?