Bring back CPU in WFE mode after a soft reset (cortexa9)

I'm working with a zynq SoC. It contains 2 CPUs cortex-a9.
My goal is to work with AMP (asymetric multiprocessing), be able to apply soft reset from one CPU to another, and then restart the CPU when it is suitable.

According to the zynq documentation :

CPU0 is in charge of starting code execution on CPU 1. The BootROM puts CPU 1 into the Wait for Event mode. Nothing has been enabled and only a few general purpose registers have been modified to place it in a state where it is waiting at the WFE instruction. There is a small amount of protocol required for CPU 0 to start an application on CPU1. When CPU 1 receives a system event, it immediately reads the contents of address 0xFFFFFFF0 and jumps to that address. If the SEV is issued prior to updating the destination address location (0xFFFFFFF0), CPU 1 continues in the WFE state because 0xFFFFFFF0 has the address of the WFE instruction as a safety net. If the software that is written to address 0xFFFFFFF0 is invalid or points to uninitialized memory, results are unpredictable.

The steps for CPU 0 to start an application on CPU 1 are as follows:
1. Write the address of the application for CPU 1 to 0xFFFFFFF0.
2. Execute the SEV instruction to cause CPU 1 to wake up and jump to the application.
The address range 0xFFFFFE00 to 0xFFFFFFF0 is reserved and not available for use until the stage 1 or above application is fully functional. Any access to these regions prior to the successful start-up of the second CPU causes unpredictable results.

So far, I'm able to start CPU1 from CPU0 when the system boot from the bootRom. I write the CPU1 application address in 0xFFFFFFF0 and then send an event.

void startCPU1()
{
    Xil_Out32(0xFFFFFFF0, 0x02000000);  // write CPU1 application address 
    dmb(); // waits until write has finished
    sev(); // send the SEV to wake up CPU1
}

This is working well.

Then, pushing a button call a function to apply soft reset from CPU0 to CPU1. I can observe CPU1 is stopped (the led corresponding to CPU1 is stopped).

Now we enter the part I didn't fully understand.

According to the ARM documentation:

When issuing the "CPU 1 software reset control" the CPU 1 will jump to address 0x0.

Only the SRST will force the bootROM to execute that will place CPU to 0xFFFFFF00 area and consequently to a WFE.

So after the software reset, the CPU1 goes to address 0x00000000. I guess depending on what there is at this address, I could have unpredictable results. If I try to restart the CPU1 from CPU0 nothing happen, because CPU1 is not in a WFE mode.

My question is, how can I bring back CPU1 in WFE after this software reset ?

I would be very grateful is someone is able to explain me how to do that !
Feel free to ask more details if needed !
Thank you !

Actually if you see the ARM instruction manual you can find that WFE is actually an instruction. Simply put, before the software reset from core0, just copy the opcode of WFE instruction on 0x0 from core0 and soft reset core 1. Core1 will immediately execute WFE instruction and will go to WFE state.