LDMIA instruction results in corrupt register data

1

I'm attempting to run a compiled program on a ARM Cortex-M3 bare metal. Before the system even reaches the application code, an odd error blows the program counter away and errors out.

Before the instruction, the registers are observed to be:

r0             0x0  0
r1             0x1  1
r2             0x0  0
r3             0x2  2
r4             0x18564  99684
r5             0x18418  99352
r6             0x0  0
r7             0x0  0
r8             0x8311   33553
r9             0x0  0
r10            0x0  0
r11            0x0  0
r12            0xc84404 13124612
sp             0x7ffe0  0x7ffe0
lr             0x80df   32991
pc             0x8380   0x8380

The following instruction is executed nominally:

0x829c <__call_exitprocs+112>:  ldmia.w sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}

And the registers being read explode. It also sends the program counter way off effectively terminating the program.

...
r3             0x2  2
r4             0xffffffff   4294967295
r5             0xffffffff   4294967295
r6             0xffffffff   4294967295
r7             0xffffffff   4294967295
r8             0xffffffff   4294967295
r9             0xffffffff   4294967295
r10            0xffffffff   4294967295
r11            0x0  0
...
pc             0xfffffffe   0xfffffffe

I've read a similar issue on stack overfflow, but it doesn't seem to be the direct issue that I'm facing here. The ATMEL documentation for this board doesn't specify a limitation on number of internal registers read at once on a quick glance.

Any thoughts on the problem and, if possible, a workaround in gcc to prevent it?

c
gcc
assembly
gdb
cortex-m3
asked on Stack Overflow Feb 26, 2017 by Smithers • edited May 23, 2017 by Community

1 Answer

2

The instruction (and its effect) are absolutely correct. But the sp value before this instruction is absolutely wrong. Your chip has no RAM memory on that address. In fact - it probably has no memory at all at this address. See page 32 of the manual (with the memory map).

http://www.atmel.com/Images/Atmel-6430-32-bit-Cortex-M3-Microcontroller-SAM3U4-SAM3U2-SAM3U1_Datasheet.pdf

Your sp should be somewhere within SRAM, so above 0x20000000. The value you have - 0x7ffe0 is somewhere in the "Boot memory" region. If you want to find the problem, find out why sp has invalid value.

answered on Stack Overflow Feb 27, 2017 by Freddie Chopin • edited Feb 27, 2017 by Freddie Chopin

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