Why does the MIPS instruction "add" sometimes give me an arithmetic error, but not always?

1

I recently used MARS4.5 to practice writing assembly language for MIPS, but I encounter some problems.

The first code is:

addi $s0,$s0,8 #s0 = 0x00000008
sll $s0,$s0,28 #s0 = 0x80000000
addi $s1,$s1,13#s1 = 0x0000000D
sll,$s1,$s1,28 #s1 = 0xD0000000
add $t0,$s0,$s1 #t0 =0xD0000000 + 0x80000000

and I will get the arithmetic error

The second code is:

addi $s0,$s0,-1 #s0 = 0xffffffff
addi $s1,$s1,2  #s1 = 0x00000002
add $t0,$s0,$s1 #t0 =0xffffffff + 0x00000002

and I will get the result 0x00000001

Both of the codes will encounter the overflow, and why did I not get the error in the second code?

By the way, I also want to ask how "sub" works? Does it will first transform RT(subtrahend) into the form of two's complement and add it with RS(minuend)?

Thank you!!

assembly
mips
add
asked on Stack Overflow Oct 20, 2015 by chengchinlee

1 Answer

1

Adding numbers with different signs never has signed overflow. You have -1 + 2 there, what's the problem?

It does overflow unsigned, carry out of the top bit, but that's irrelevant for add.

By the way, I also want to ask how "sub" works? Does it will first transform RT(subtrahend) into the form of two's complement and add it with RS(minuend)?

That's one way to do it, but probably not the physical implementation. More likely it's implemented as either a - b = ~(~a + b) or a - b = a + ~b + 1, the second one obviously directly equivalent to negating and then adding, but the implementation will just be an adder that can take a carry-in instead of two separate adders.

answered on Stack Overflow Oct 20, 2015 by harold

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