I am using the FT232H device connected to the FPGA, and I am trying to write some bytes to it. Reading (transfer FPGA->PC) works perfectly, but writing (transfer PC->FPGA) do not work at all. I am using following code:
libusb_open(board, &board_handle);
if (libusb_kernel_driver_active(board_handle, 0) == 1) {
if(libusb_detach_kernel_driver(board_handle, 0) == 0);
}
libusb_set_configuration(board_handle, 1);
libusb_claim_interface(board_handle, 0);
libusb_control_transfer(board_handle, 0x40, 0x0B, 0x00FF, 0x01, NULL, 0, 5000);
libusb_control_transfer(board_handle, 0x40, 0x0B, 0x40FF, 0x01, NULL, 0, 5000);
libusb_bulk_transfer(board, 0x02, bufout, 3, &transfered, 5000);
bufin = calloc(512, 1);
libusb_bulk_transfer(board, 0x81, bufin, 512, &transfered, 5000);
Bufout
is filled with data. When I am trying to send some data generated on the FPGA to the PC there is no problem; bufin
is filled with correct data.
But when I am trying to send some data to the FPGA, and display it on leds or send it back, the problem starts.
Every byte I receive at the FPGA site is 0xFF regardless of bufout
content. Bufout
and bufin
are both declarated as unsigned char *.
unsigned char *bufin, *bufout;
Surprisingly (or not) the number of bytes received FPGA match the number of bytes sended by the PC, but all bytes have value 0xFF.
Am I doing something wrong?
I tried using libftdi, but the effect is the same (not surprising libftdi is using libusb as an engine I think).
Maybe I forgot to call some important function on the host side?
Code on the FPGA side is also very simple:
process(ftdi_clk, sys_rst)
begin
if sys_rst = '0'then
ftdi_wr <= '1';
ftdi_data <= "ZZZZZZZZ";
ftdi_rd <= '1';
ftdi_oe <= '1';
read <= '1';
elsif rising_edge(ftdi_clk) then
if ftdi_txe = '0' then
ftdi_wr <= '0';
ftdi_data <= buf;
else
ftdi_wr <= '1';
ftdi_data <= "ZZZZZZZZ";
end if;
if (read = '0') and (ftdi_rxf = '0') then
ftdi_rd <= '0';
buf <= ftdi_data;
else
ftdi_rd <= '1';
end if;
if ftdi_rxf = '0' then
ftdi_oe <= '0';
read <= '0';
else
ftdi_oe <= '1';
read <= '1';
end if;
end if;
end process;
EDIT: I have checked all possible electrical configuration, pullups, i/o voltage and everything seems fine. Still all data transferred from the FTDI to the FPGA are ones, checked on 2 separate chips, so most probably it is a software problem. I have checked simulation, even post-fit simulation, communication should work according to the documentation.
EDIT2: I have tried with original vendor libraries.
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ftd2xx.h>
int main(){
FT_STATUS ftStatus;
FT_HANDLE ftHandle;
DWORD BytesWritten;
unsigned char data[512];
int i;
FT_PROGRAM_DATA ftData = {
0x00000000, 0xFFFFFFFF, // Headers
0x00000005, // Version (5 = 232H)
0x0403, 0x6014, // VID:PID
"StackOverflow", "Stack", "StackBoard", NULL,
500, 0, 1, 1, // MaxPower, PnP, SelfPowered, Remote WakeUp
// FT232B
0, 0, 0, 0, 0, 0, 0,
// FT2232
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// FT232R
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
// FT2232H
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0,
// FT4232H
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0,
// FT232H
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0,
};
ftStatus = FT_Open(0, &ftHandle);
ftStatus = FT_SetTimeouts(ftHandle, 5000, 5000);
ftStatus = FT_EE_Program(ftHandle, &ftData);
ftStatus = FT_EE_Program(ftHandle, &ftData);
ftStatus = FT_SetBitMode(ftHandle, 0xFF, FT_BITMODE_SYNC_FIFO);
for(i = 0; i<512; i++) data[i] = 0x02;
ftStatus = FT_Write(ftHandle, data, 512, &BytesWritten);
printf("%d bytes written\n", BytesWritten);
ftStatus = FT_Read(ftHandle, &data, 512, &BytesWritten);
printf("%d bytes read\n", BytesWritten);
for(i = 0; i<BytesWritten; i++) printf("%#2x ", data[i]);
FT_Close(ftHandle);
}
Still exactly the same behavior. I have updated linux kernel to the most recent one (4.2.3) but results are the same. Sadly I checked on few different machines and 3 different chips.
Not sure if it is your only problem, but I think you have some short-circuits going on on ftdi_data. It can be driven by the FPGA at the same time as ftdi_oe is active.
User contributions licensed under CC BY-SA 3.0