Are possible ones these MIPS instructions?

0

I'm trying to crash problems in the book 'Computer organization and Design'.

I come across a sequence of instructions in solution of book. But Qtspim, mips assembler, can't interpret them. Here is instructions. (book 4th edition, problem 2.14.4 a)

add  $t2, $t0, $0
srl  $t2, $t2, 11
and  $t2, $t2, 0x0000003f
and  $t1, $t1, 0xffffffc0
ori  $t1, $t1, $t2

Why ori has 3 registers? (I thought it is not r-type instruction) Why and has 32bit immediate? (I thought instruction itself has 32bit wise.)

Thank you in advance.

mips
computer-architecture
asked on Stack Overflow Mar 31, 2013 by inherithandle

1 Answer

1

The first two instructions look ok, but the following three do not. It's possible that those are typos, or that the author of the book was using a different MIPS assembler which accepts those instructions and converts them into valid ones.

For example:

and $t2,$t2,0x0000003f

=>
lui $t2,0 ; ANDing the upper halfword with 0x0000 would set it to 0
andi $t2,$t2,0x003f


and $t1,$t1,0xffffffc0

=>
andi $t1,$t1,0xffc0 ; ANDing the upper halfword with 0xffff would not change it


ori $t1,$t1,$t2

=>
or $t1,$t1,$t2

answered on Stack Overflow Mar 31, 2013 by Michael • edited Mar 31, 2013 by Michael

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